Hanoi (VNA) – Intel is stepping up its long-term commitment to Vietnam’s semiconductor sector by expanding production in Ho Chi Minh City and investing in workforce training, reinforcing the country’s role in the global tech value chain.
According to the Saigon Hi-Tech Park (SHTP) management board, Intel has relocated part of its production line from Costa Rica to SHTP as part of its global manufacturing restructuring strategy aimed at improving efficiency and competitiveness.
Intel Products Vietnam (IPV), based at SHTP, is currently the largest chip assembly and testing facility in Intel’s global network. Operational since 2010 with an initial investment of 1 billion USD, the plant plays a key role in the corporation’s semiconductor supply chain.
IPV’s export value has recorded steady growth, rising from 10.31 billion USD in 2023 to 11.67 billion USD in 2025. The figure is projected to reach 14.6 billion USD in 2026, marking an estimated year-on-year increase of around 25%.
The addition of new production lines in Ho Chi Minh City and Intel’s continued expansion in Vietnam are expected to provide fresh impetus for the domestic semiconductor industry, while creating opportunities for the Southeast Asian country to integrate more deeply into the global technology value chain.
Beyond manufacturing, Intel has also been actively involved in developing semiconductor human resources. In April this year, at the second annual conference of the Alliance for Research and Training in Semiconductors and Microelectronics (ARTSeMi), the company signed cooperation agreements on training, and research and development (R&D) with ARTSemi and the University of Science under the Vietnam National University – Ho Chi Minh City. The initiative aims to train around 300 core lecturers in the field of semiconductor microchips.
On May 5, Intel continued to support training efforts by handing over chip assembly and testing equipment to the SHTP’s training centre and Vietnam National University, Hanoi, to serve education, research, and hands-on practice in chip packaging and testing./.
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